ELK GROVE, Calif., Nov. 11, 2026 (GLOBE NEWSWIRE) — Accellera Systems Initiative (Accellera), today announced that its Board of Directors has approved the Portable Test and Stimulus Standard (PSS) 3.1, the latest evolution of the industry standard for portable verification intent. The new standard introduces significant enhancements that improve model reuse, constraint expressiveness, software integration, target-code generation, and coordination across increasingly complex hardware and software execution environments. The latest version is available for immediate download.
Building on the foundation established by PSS 3.0, the 3.1 release advances Accellera’s vision of enabling engineers to capture verification intent once and reuse that intent across simulation, emulation, FPGA prototyping, post-silicon validation, and heterogenous executing domains.
“Accellera brings the industry together to develop standards that enable innovation, interoperability, and greater productivity in electronic design and verification,” said Lu Dai, Accellera Chair. “PSS 3.1 extends the value of verification intent through greater reuse, enhanced software integration, and improved support for today’s increasingly complex computing architectures. This release reflects the ongoing collaboration of our member companies and working group contributions to address real-world design and verification challenges.”
PSS enables engineers to describe stimulus and test scenarios in a high-level implementation-independent form and automatically realize those scenarios across multiple execution platforms. By separating intent from implementation, PSS helps teams reuse verification content from IP and subsystem verification through SoC and system-level validation while improving productivity and consistency across projects.
“PSS 3.1 delivers some of the most significant language and methodology enhancements since the introduction of PSS 3.0,” said Matthew Ballance, Chair of Accellera’s Portable Stimulus Working Group. “The new release provides engineers with more expressive constraint capabilities, greater flexibility in building reusable verification models, improved integration with software-driven environments, and new mechanisms for coordinating verification activity across multiple execution domains. I would like to thank the members of the working group whose expertise and commitment made this release possible.”
Key Enhancements in PSS 3.1
PSS 3.1 introduces new capabilities that strengthen the standard’s applicability across modern hardware/software verification environments while preserving the portability and reuse that have become the hallmark of PSS.
- More Expressive Constraint Modeling
PSS 3.1 expands the language with generic constraints, soft constraints, and enhanced array-slice operations, enabling engineers to create more reusable and maintainable verification models. These capabilities allow verification intent to be expressed with greater flexibility while reducing model duplication and supporting more sophisticated scenario generation methodologies.
- Greater Reuse and Customization of Verification Models
New features such as action overriding in component subtypes, mutable component attributes, and instance-qualified component references make it easier to adapt verification content across projects, product families, and execution environments. These enhancements support the creation of reusable verification libraries that can evolve as designs change.
- Enhanced Software Integration and Target Realization
PSS 3.1 improves realization capabilities through support for exported functions, enhanced template processing, execution tags that eliminate duplicate generated code, and standardized documentation annotations. Together, these capabilities improve interoperability between PSS models and software environments while providing greater control over generated target implementations.
- Support for Heterogeneous Execution Environments
Recognizing the growing importance of software-defined and heterogeneous computing platforms, PSS 3.1 introduces capabilities for executor grouping, inter-executor communication, and synchronization mechanisms. These enhancements enable portable stimulus models to coordinate behavior across multiple processors, execution contexts, and target environments.
- Expanded Address and Register Modeling
The release strengthens address and register abstraction with support for shared address claims, negative address offsets, extensible memory-access controls, register collections, and symbolic register representation. These capabilities simplify the modeling of sophisticated memory and register architectures commonly found in today’s complex SoCs and embedded systems.
In addition to these enhancements, PSS 3.1 includes numerous clarifications, semantic refinements, corrections, and organizational improvements that support more consistent implementation and interoperability across tools.
Resources for Learning and Adopting PSS
Accellera offers educational resources to help engineers understand PSS and apply it in their verification methodologies. The 16-part “Learning PSS” video series progresses from fundamental concepts to techniques for creating reusable verification models and realizing them on target platforms.
The video series and additional tutorials, workshops, and examples are accessible through the Portable Stimulus Working Group page. Engineers can ask questions about the standard and provide feedback through the Portable Stimulus Community Forum.
About Accellera
Accellera Systems Initiative is an independent, not-for-profit organization and the leading force in the creation and adoption of electronic design automation (EDA) and intellectual property (IP) standards. Accellera creates, supports, promotes, and advances system-level design, modeling, and verification standards for use by the worldwide electronics industry. As part of its ongoing partnership with the IEEE, Accellera contributes its standards to the IEEE Standards Association for formal standardization and ongoing change control. For more information, please visit www.accellera.org. Find out more about membership. Follow @accellera on X and LinkedIn or, to comment, please use #accellera. Accellera Global Sponsors are: Cadence, ChipAgents, Siemens, and Synopsys.
Accellera and Accellera Systems Initiative are trademarks of Accellera Systems Initiative Inc. All other trademarks and trade names are the property of their respective owners.
For more information, contact:
Barbara Benjamin
Marketing Communications for Accellera Systems Initiative
Phone: +1 503 209 2323
Email: barbara@hipcom.com
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